1. Field of the Invention
The present invention relates to a semiconductor device and a method for controlling the semiconductor device, and more particularly to a semiconductor device having the SOI structure and a method for controlling the semiconductor device.
2. Description of the Background Art
A SOI (Silicon On Insulating) device has a number of superior characteristics such as low power consumption, high-speed operation, and latch-up free. A thin-film BOX-SOI device, in which a BOX (Buried Oxide) layer is reduced in thickness to approximately 10 nm, in particular, has a planar double-gate structure. Therefore, the device is advantageous in that a short channel can be realized while a dopant concentration of the SOI layer is retained at a low level, and variability of a threshold voltage resulting from dopant-induced fluctuation, which has been increasingly evident in and after the 65-nm generation, can be lessened. For example, Japanese Patent Application Laid-Open No. 2005-251776 and R. Tsuchiya et al., “Silicon on Thin BOX: A New Paradigm of The CMOSFET for Low-Power and High-Performance Application Featuring Wide-Range Back-Bias Control”, IEDM Tech., 2004, pp 631, and the like, recite the conventional technologies relating to the BOX-SOI device.
It is described below how the threshold voltage variability and an operation stability of SRAM (Static Random Access Memory) relate to each other. When the threshold voltage variability is 20 mV, there is some allowance in an operation margin. When the threshold voltage variability is 40 mV, however, there is hardly the operation margin. In a case where a conventional bulk transistor is used as the transistor in and after the 65-nm generation, it is difficult to control the threshold voltage variability to at most 40 mV, which, therefore, makes it difficult to constantly operate the SRAM in a stable manner.
The thin-film BOX-SOI device, which is configured such that not only the threshold voltage variability can be reduced but also the thin-film BOX layer having the film thickness of approximately 10 nm is adopted, is characterized in that transistor characteristics can be controlled by the application of a back bias. R. Tsuchiya et al., “Silicon on Thin BOX: A New Paradigm of The CMOSFET for Low-Power and High-Performance Application Featuring Wide-Range Back-Bias Control”, IEDM Tech., 2004, pp 631 recites that the various characteristics, such as the threshold voltage of the transistor, can be controlled when the back bias is applied thereto. R. Tsuchiya et al., “Silicon on Thin BOX: A New Paradigm of The CMOSFET for Low-Power and High-Performance Application Featuring Wide-Range Back-Bias Control”, IEDM Tech., 2004, pp 631 also recites that the application of a forward bias does not generate the flow of a junction leak current because the SOI structure is adopted, as a result of which the back bias can be applied in a significantly broad range in comparison to the conventional bulk device.
In a case where a logic circuit and a SRAM memory cell are provided in the semiconductor device, however, it was yet to be clearly known how the back bias should be most suitably applied to operate the device. More specifically, R. Tsuchiya et al., “Silicon on Thin BOX: A New Paradigm of The CMOSFET for Low-Power and High-Performance Application Featuring Wide-Range Back-Bias Control”, IEDM Tech., 2004, pp 631 recites the matters relating to the semiconductor device having the thin-film BOX-SOI structure where the logic circuit and the SRAM are formed on one semiconductor substrate, and the back bias, while failing to disclose any technology relating to a semiconductor device where the logic circuit can be operated at a high speed and the SRAM can be stably operated, and a method for controlling such a semiconductor device.